Abstract: Address mapping is the most important function of flash translation layer (FTL), and it should have both high performance and low memory footprint. Although demand-based address mapping scheme(DFTL) has relatively high performance and low memory footprint, it has problems. First, it is a page-level mapping scheme. Each cache slot stores only one mapping record, and each mapping record stores only one physical page number and the corresponding logical page number, so that the cache , at a fixed size, can only store a limited number of mapping records. Second, each mapping record itself cannot exploit the spatial locality of the request. Thus, in the DFTL scheme, since the cache hit ratio is low, DFTL has to frequently access the mapping pages in the flash memory to read the mapping records, which significantly reduces the performance of the system. A new scheme named VGFTL (a mapping scheme of variable granularity-based flash translation layer) was proposed, which could significantly increase the cache hit ratio. Experimental results show that the average hit ratio of cache has reached 89.85% in VGFTL scheme, which is much higher than that of the DFTL scheme, 45.46%. VGFTL can significantly reduce the number of block erasures and system response time compared to DFTL, and is close to pure page-level mapping scheme in performance.

Key words: NAND flash, flash translation layer, address mapping, variable granularity-based mapping