[1] WINKLES J. Elastic buffer implementations in PCI express devices[EB/OL]. [2017-10-18], http://www.doc88.com/p-781379861436.html, Mindshare Inc. [2] 彭琰, 曾云, 王太宏,等. 基于HID类USB外设功能控制器的ASIC设计[J]. 微电子学与计算机, 2009, 26(4): 15-18.
[3] Wikipedia. USB[EB/OL].[2011-09-28], http://en.wikipedia.org. [4] 朱小明, 王小力, 程曾. USB3.0物理层中弹性缓冲器的设计与实现[J]. 微电子学与计算机, 2012, 29(6): 117-121. [5] 邢辉. 弹性缓冲在USB3.0物理层中设计与实现[EB/OL]. 北京: 中国科技论文在线, 2012. [6] 廖艳,王广君,高杨. FPGA异步时钟设计中的同步策略[J].自动化技术与应用, 2006, 25(1): 67-68. [7] Universal Serial Bus 3.0 Specification. 112009004327.5[P]. USA:HP Company, 2008. [8] 郑乾, 晏敏, 赵建中,等. 基于PCIE2.0的物理层弹性缓冲器设计[J]. 计算机工程, 2014, 40(10): 71-75.
[9] MICHELOGIANNAKIS G, BALFOUR J, DALLY W J. Elastic buffer flow control for On-chip Network[C]// The 15th International Symposium on High Performance Computer Architecture. Raleigh, USA: IEEE, 2009: 151-162. [10] 刘奇浩, 翁慧辉, 张峰,等.65nm工艺下基于PCI Express2.0 协议的物理层编码子层设计[J].中国集成电路, 2013, 22(3): 41-45.
[11] WOODRAL D E. Elastic buffer module for PCI express devoices, 7281077B2 [P]. USA, 2007. [12] CUMMINGS C E. Simulation and synthesis techniques for as synchronous FIFO design with asynchronous pointer comparisons [EB/OL]. [2017-10-18], http://read.pudn.com/downloads116/doc/495591/asyn_FIFO.pdf. [13] 郑争兵. 基于FPGA的高速采样缓存系统的设计与实现[J]. 计算机应用, 2012, 32(11): 3259-3261.
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