Abstract: Elastic buffers are widely used in the high speed interface of the physical layer, which usually completes the addition and deletion of skip（SKP） by reading/writing pointer jumping and breakpoint preservation. However, common single pointer elastic buffer must be operated at high frequencies, which would make it easy to create complex timing problems. To solve these problems, based on the FPGA and the USB3.0 protocol, a four read/write pointer addressing elastic buffer to complete the addition and deletion of SKP has been proposed. First, the elastic buffer makes use of the input control unit to change the sequence of the SKP pairs in the input data and the output control unit to change the output data. Then, the threshold detection unit sends the valid instructions to the read/write pointer control unit by checking whether the amount of valid data in the elastic buffer achieves the threshold which is added or deleted. Last, to maintain the elastic buffer in half full state, the SKP in data is added or deleted by controlling the addressing of the four read/write pointers. Experimental results show that the designed elastic buffer can achieve the function of SKP addition and deletion, and its clock frequency can satisfy the protocol of Universal Serial Bus 3.0.

Key words: high speed interface, pointer, address, clock